← CA-3 · KIRCHHOFF & SYSTEMATIC ANALYSIS

KCL and KVL

YOU WILL BE ABLE TO
  • Define node, branch, and loop.
  • State Kirchhoff's current law and apply it at a node.
  • State Kirchhoff's voltage law and apply it around a loop.
  • Solve single-loop and single-node circuits using both laws with Ohm's law.

Equivalent resistance and dividers handle circuits you can peel apart pattern by pattern. Most circuits refuse. The general attack rests on two conservation laws published by Gustav Kirchhoff in 1845 — before the electron was discovered — and they are the legal foundation of every analysis method, every simulator, and the validator inside PCB Studio. Three words first: a node is a connection point shared by two or more elements; a branch is a single element between two nodes; a loop is any closed path through the circuit.

Kirchhoff's current law (KCL) is conservation of charge applied to a point: charge cannot pile up at a node, so the current flowing in must equal the current flowing out, at every instant.

∑iin=∑iout\sum i_{\text{in}} = \sum i_{\text{out}}KCL
i1i2i3
KCL at a node: what flows in must flow out — here i_1 + i_2 = i_3.

Kirchhoff's voltage law (KVL) is conservation of energy applied to a round trip: walk any loop back to your starting point and the voltage rises must cancel the voltage drops — otherwise a charge could circle forever gaining energy from nothing.

∑loopv=0\sum_{\text{loop}} v = 0KVL
+−vsR1+−v1R2+−v2i
KVL around one loop: v_s = v_1 + v_2. The source's rise pays for every drop.
WORKED EXAMPLE

KCL at a node

  1. Currents of 3 A and 4 A flow into a node; one branch carries 2 A out. Find the current in the remaining branch.
  2. In = out: 3 + 4 = 2 + i.
  3. i = 5 A, flowing out.
5 A out of the node
WORKED EXAMPLE

KVL around a loop

  1. In the loop of the figure above, v_s = 9 V and the resistors drop v_1 = 2 V and v_2.
  2. KVL walking clockwise: −9 + 2 + v_2 = 0.
  3. v_2 = 7 V. If the loop current is 10 mA, then R_2 = 7/0.010 = 700 Ω.
v_2 = 7 V; R_2 = 700 Ω

PRACTICE

Q1

A node has currents of 6 mA and 2 mA entering, and 5 mA leaving through one branch. What is the current in the fourth branch, and which way does it flow?

Q2

A single loop contains a 12 V source and three resistors dropping 3 V, 4 V, and v_3. Find v_3.

Q3

In one or two sentences: why can't charge accumulate at a node in an ordinary circuit?

Q4

Applying KVL clockwise around a loop you compute a resistor voltage of −4 V with your + mark on the left. What does the sign tell you?

KCL and KVL · CA-3 · iLearnSTEM Electronics